Pass transistors are extensively used in programmable integrated circuit (IC) devices to selectively control signal transmission between two nodes. One type of programmable IC device utilizing pass gate transistors in this manner is field programmable gate arrays (FPGAs) manufactured by Xilinx, Inc. of San Jose, Calif.
FIG. 1 shows a simplified diagram of a conventional NMOS pass transistor 100 typically utilized in an FPGA manufactured by Xilinx, Inc. Pass transistor 100 includes a drain D connected to the output terminal of a first inverter 110, a source S connected to the input of a second inverter 120, a gate G connected to an SRAM cell 130, and a body B which is grounded. First and second inverters 110 and 120 serve as buffers for transmitting reliable signals along the path through pass transistor 100. SRAM cell 130 is depicted in a simplified form as a pair of inverters 132 and 134 connected in a loop. The programmed state of SRAM cell 130 determines the conductive state of pass transistor 100.
In operation, if a user's circuit requires the transmission of signals along the path through pass transistor 100, then SRAM cell 130 is programmed to apply a high signal to gate G, thereby turning on pass transistor 100. Subsequent signals transmitted from first inverter 110 are passed through pass transistor 100 to second inverter 120 and to subsequent circuitry on the FPGA.
A problem associated with pass transistor 100 is that the source-body bias often causes the "body effect" to increase the threshold voltage and thereby reduce the switching speed and transmission speed of pass transistor 100. This problem is described with reference to FIG. 1B, which compares drain-to-source current I.sub.DS versus gate-to-source voltage V.sub.GS. As indicated in the solid line on FIG. 1B, when the body-to-source voltage V.sub.BS equals zero, the threshold voltage V.sub.T1, of pass transistor 100 is relatively low (e.g., 0.5 volts), and the source voltage V.sub.S applied to the input of inverter 120 is the drain voltage V.sub.D minus V.sub.T1. However, when a (logic) high voltage is transmitted across pass transistor 100, source S achieves a higher voltage level than body B (which is grounded), thereby producing a negative V.sub.BS (e.g., -1 volts). When this occurs, the resulting "body effect" causes the threshold voltage to shift to the right, as indicated by the dashed line in FIG. 1B, resulting in a relatively high threshold voltage V.sub.T2. The higher V.sub.T2 causes pass transistor 100 to turn on at a slower rate because more time is required for gate G to reach V.sub.T2 (as compared to the time necessary to reach V.sub.T1) . In addition, the higher V.sub.T2 causes a higher V.sub.DS and a lower V.sub.S. This becomes particularly important at low operating voltage levels because V.sub.T is essentially fixed.
The above-described "body effect" can be reduced using various methods such as lowering substrate doping, or lowering the source-body bias by connecting the substrate (body) to a voltage source (such as V.sub.G). However, lowering the substrate doping leads to higher off-state leakage currents and more severe short channel effects. Further, lowering the substrate doping typically requires fundamental changes to the device technology utilized to produce the IC device incorporating the pass transistors. Further, lowering the source-body bias requires a positive substrate voltage which may forward bias several PN junctions and cause high leakage and latch-up.